Audio support in HP MPower - computer network communications software - includes related article on analog-to-digital signal conversion

Hewlett-Packard Journal,  April, 1994  by Ellen N. Brandt,  Thomas G. Fincher,  Monish S. Shah

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Physical or Virtual DMA?

All modern workstations employ a virtual memory system that allows the CPU to work with virtual memory spaces that are larger than the physical memory available in the system. All programs access memory using a virtual address, and the CPU hardware translates it to a physical address. In contrast, DMA accesses do not go through that same hardware, so the hardware initiating a DMA request must supply the physical address to the bus. In that sense, HP workstations do physical DMA, not virtual DMA. Still, an I/O device could include the hardware necessary to do virtual-to-physical translation, effectively giving that device the ability to do virtual DMA. Since programs work with virtual addresses, they could communicate with I/O hardware more easily if that hardware did virtual, rather than physical DMA.

Unfortunately, virtual-to-physical translation hardware adds complexity and cost to I/O hardware. For that reason, our audio hardware does not do virtual DMA. Instead, the driver software assumes the responsibility of presenting the hardware with physical addresses. Again, the trade-off was made in favor of lower system cost.

Hardware Components

Fig. 3 shows a block diagram of the audio hardware components within a simplified representation of a workstation. As shown in the figure, the audio hardware connects to the workstation's system bus. The CPU uses the system bus to initialize the audio hardware with the desired parameters such as sample rate, volume level, and so on. The DMA block uses the system bus to read audio data for playback and to write audio data for recording. It writes the playback data into the playback FIFO and reads the recorded data from the record FIFO. Each FIFO's size is 8 words by 32 bits. The other ends of the FIFOs connect to the serial interface block. This hardware converts audio data from parallel form, which the FIFOs use, to serial form, which the audio CODEC requires. The term CODEC is an abbreviation for coder/decoder. In this context, analog-to-digital converters are called coders and digital-to-analog converters are called decoders. The audio CODEC implements two converters of each type in a single chip, allowing stereo operation. Some of the CODEC inputs and outputs are buffered with analog amplifiers. In some cases, the amplifiers provide more gain, while in others they help match input or output impedance. The CODEC also implements the logic required to support the various sample rates and data formats discussed earlier. The analog-to-digital and digital-to-analog converters inherently operate with 16-bit linear data. So, if A-law or [micro]-law mode is selected, the CODEC converts playback data from the selected mode to 16-bit linear and recorded data from 16-bit linear to the selected mode.

The CODEC is a commercially available part. A single gate array implements the rest of the logic in the audio hardware. Some salient features of this HP-designed gate array are: 4,953 gates

1 .O-micrometer technology