Synopsys unveils VHDL software aimed at cutting simulator count

Electronic News,  Nov 22, 1993  

Tags: software

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MOUNTAIN VIEW, CALIF.--Synopsys is introducing two new packages in its VHDL System Simulator (VSS) line, the VSS Professional and VSS Expert. The offerings are expected to help system designers reduce the number of simulators they must use in completing a design.

VSS Professional is priced at $13,000 and VSS Expert at $24,000. All existing VSS customers on maintenance agreements will automatically receive VSS Expert at no extra charge. The two new packages are expected to ship by the end of Q194. Earlier this year, Synopsys had expected to ship its release 3.1 software by the end of the year, but that date has now slipped by a few months.

Synopsys continues to target the VHDL simulation market because it sees that segment as the fastest growing, according to Pierre Wildman, group marketing manager for simulation. A recent Dataquest forecast shows VHDL outpacing Verilog and more traditional simulators in growth over the next four years.

VHDL "is growing at the expense of gate-level design," Mr. Wildman said. Verilog is also growing as the hardware description language market grows, but VHDL is projected to surpass Verilog in annual sales next year.

The new simulators are meant to provide "a fast, lowrisk path from concept to sign-off," Mr. Wildman said. VSS Professional is intended for individual use during presynthesis VHDL model development and system verification. It combines interpreted and compiled simulation "engines," integrated through a single simulation "time-wheel," rather than through a simulation backplane.

VSS Expert includes all the features of VSS Professional, along with a specialized gate-level sign-off simulation engine, system-level modeling support and ASIC vendor sign-off support. Synopsys has enlisted four ASIC vendors as VSS "sign-off partners": NEC, Toshiba, Texas Instruments and Thesys Microelectronics.

Synopsys noted the two simulators offer design groups a choice for each phase of the design process: an interpreted simulator for interactively debugging the behavioral system design, a compiled simulator for register-ttransfer level (RTL)_ development and system verification and a full timing gate-level simulator for ASIC sign-off.

"By giving design teams a family of simulators, we're enabling them to buy the right simulator in the right quantity for their particular needs," said Greg Jones, Synopsys' director of systems marketing. "Now companies can tailor their simulation purchase to match the configuration of their design teams."

VSS is integrated with Synopsys' Design Compiler line of synthesis tools and equipped with a synthesis policy checker to make sure that all VHDL models can be synthesized.

Synopsys is currently pursuing a misappropriation of trade secrets lawsuit against Cadence Design Systems in connection with Cadence's latest VHDL simulator, Leapfrog (EN, March 15). Cadence acquired the "native compiled code" technology behind Leapfrog from a small Ohio firm, Seed Solutions, whose founders formerly developed VHDL simulation technology for Zycad. When Zycad sold its VHDL simulation business to Synopsys in 1990, Seed went off on its own. Whether Seed's founders took technology they developed under contract to Zycad or developed the Leapfrog technology on their own is a point of contention between Synopsys and Cadence.

Last summer, Synopsys was forced to find a new law firm in the Leapfrog case after it was revealed that one of its attorneys had worked for a firm that previously represented Cadence in legal matters (EN, Antenna, Aug. 23).

Elsewhere on the VHDL competitive front, Vantage Analysis Systems will weigh in next month with SpeedWave, which is intended to accelerate VHDL simulations. The Viewlogic Systems subsidiary has been promoting the introduction with a mailing that appears like a traffic violation notice. The recipient is "cited" for such "violations" as "going too slow in the VHDL simulation fast lane" and "failure to accelerate product development in time for Comdex."

Viewlogic recently introduced the ViewSim/VHDL and View/VHDL simulators for the Unix and PC environments, including Windows (EN, CAE Software, Sept. 27). Mr. Wildman said Synopsys had no plans for Windows- or PC-based packages at the moment.

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